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power management ic,
power management chip
■ High-performance 2.5-V CMOS EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX®) architecture (see Table 1)
– Pin-compatible with the popular 5.0-V MAX 7000S and 3.3-V
MAX 7000A device families
– High-density PLDs ranging from 600 to 10,000 usable gates
– 3.5-ns pin-to-pin logic delays with counter frequencies in excess
of 303.0 MHz
■ Advanced 2.5-V in-system programmability (ISP)
– Programs through the built-in IEEE Std. 1149.1 Joint Test Action
Group (JTAG) interface with advanced pin-locking capability
– Enhanced ISP algorithm for faster programming
– ISP_Done bit to ensure complete programming
– Pull-up resistor on I/O pins during in-system programming
– ISP circuitry compliant with IEEE Std. 1532
All the PMIC are available from us. Please email for detail .
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1 Warranty and Return Policy
a, We can ship the products all over world.
b, DHL, FedEx, TNT, UPS, EMS, Air mail are all available.
c, The item will be sent out with 1-3 working days after receiving the payment.
d, You can track the situation of your product on website after they are shipped out. DELIVERY TIME
A. Parcel will be shipped within 1-3 working days..
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